• DocumentCode
    2283774
  • Title

    A Code Generation Algorithm for Affine Partitioning Framework

  • Author

    Liao, Shih-Wei ; Du, Zhaohui ; Wu, Gansha ; Lueh, Guei-Yuan

  • Author_Institution
    Microprocessor Technol. Labs., Intel Corp., Santa Clara, CA
  • Volume
    2
  • fYear
    2005
  • fDate
    22-22 July 2005
  • Firstpage
    17
  • Lastpage
    21
  • Abstract
    Multiprocessors are about to become prevalent in the PC world. Major CPU vendors such as Intel and Advanced Micro Devices have recently announced their imminent migration to multicore processors. Affine partitioning provides a systematic framework to find asymptotically optimal computation and data decomposition for multiprocessors, including multicore processors. This affine framework uniformly models a large class of high-level optimizations such as loop interchange, reversal, skewing, fusion, fission, re-indexing, scaling, and statement reordering. However, the resulting code after applying affine transformations tends to contain more loop levels and complex conditional expressions. This impacts performance, code readability and debuggability for both programmers and compiler developers. To facilitate the adoption of affine partitioning in industry, we address the above practical issues by proposing a salient two-step algorithm: coalesce and optimize. The coalescing algorithm maintains valid code throughout and improves readability and debuggability. We demonstrate with examples that the optimization algorithm simplifies the resulting loop structures, conditional expressions and array access functions and generates efficient code
  • Keywords
    multiprocessing systems; optimisation; program compilers; program control structures; program debugging; Advanced Micro Devices; CPU vendor; Intel; affine partitioning framework; array access function; coalescing algorithm; code debuggability; code generation algorithm; code readability; conditional expression; loop structure; multicore processor; multiprocessor; optimization algorithm; Application software; Central Processing Unit; Concurrent computing; Educational institutions; Microprocessors; Multicore processing; Parallel processing; Partitioning algorithms; Program processors; Programming profession;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel and Distributed Systems, 2005. Proceedings. 11th International Conference on
  • Conference_Location
    Fukuoka
  • ISSN
    1521-9097
  • Print_ISBN
    0-7695-2281-5
  • Type

    conf

  • DOI
    10.1109/ICPADS.2005.12
  • Filename
    1524242