Difference set codes for soft error protection in memories

Author

Temina Thomas, K. ; Siva Mangai, N.M.

Author_Institution

Dept. of Electron. & Commun. Eng., Karunya Univ., Coimbatore, India

fYear

2014

fDate

13-14 Feb. 2014

Firstpage

1

Lastpage

5

Abstract

Radiation induced soft errors has become a major concern in semiconductor industries because it seriously affect the reliability of devices. Due to technology scaling, multiple cell upsets (MCU) has become more common and affect a large number of cells. In order to protect the memories from MCU, advanced error correcting codes (ECC) can be used to correct multiple errors. The major drawback of these codes is their increased decoding complexity. By using the one step majority logic decodable codes (OS-MLD) the decoding complexity can be reduced. Difference set (DS) codes are one example of OS-MLD codes. In this paper a technique is explained to provide enhanced error correction capability of DS codes, by placing the bits in the memory in such a way to exploit the localization of errors caused by MCU.

Keywords

decoding; error correction codes; majority logic; radiation hardening (electronics); storage management chips; MCU; OS-MLD codes; decoding complexity; difference set codes; enhanced error correction capability; error correcting codes; error localization; memories; multiple cell upsets; one step majority logic decodable codes; soft error protection; Bismuth; Clocks; Decoding; Electron devices; Encoding; Reliability; Welding; Correction threshold; Difference set cyclic codes; One step majority logic decoding; Soft errors;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics and Communication Systems (ICECS), 2014 International Conference on

Conference_Location

Coimbatore

Print_ISBN

978-1-4799-2321-2

Type

conf

DOI

10.1109/ECS.2014.6892598

Filename

6892598