DocumentCode :
2284467
Title :
A physics-based model of on-chip decoupling capacitor for accurate power integrity analysis
Author :
Cheng, Yu-Jen ; Chuang, Hao-Hsiang ; Hsia, Chun ; Chen, Wen-Wei ; Huang, Wen-Po ; Wu, Tzong-Lin
Author_Institution :
Dept. of Electron. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fYear :
2011
fDate :
12-14 Dec. 2011
Firstpage :
1
Lastpage :
4
Abstract :
A physics-based equivalent circuit model of on-chip decoupling capacitor for chip modelling is proposed for use in accurate power integrity (PI) analysis. The proposed model can be easily applied to on-chip decoupling capacitor design based on the construction flow. The accuracy of the model has been verified with circuit simulation. By using this model and an incomplete one, a case study of chip-package co-simulation in H-spice environment is investigated, which successfully demonstrate the purpose of the proposed model.
Keywords :
capacitors; equivalent circuits; H-spice environment; chip modelling; chip-package cosimulation; on-chip decoupling capacitor; physics-based equivalent circuit model; physics-based model; power integrity analysis; Capacitance; Capacitors; Equivalent circuits; Integrated circuit modeling; Predictive models; Simulation; System-on-a-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), 2011 IEEE
Conference_Location :
Hanzhou
ISSN :
2151-1225
Print_ISBN :
978-1-4673-2288-1
Electronic_ISBN :
2151-1225
Type :
conf
DOI :
10.1109/EDAPS.2011.6213773
Filename :
6213773
Link To Document :
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