Title :
A reduced overhead replacement policy for Chip Multiprocessors having victim retention
Author :
Das, Shirshendu ; Buragohain, Dhantu ; Kapoor, Hemangee K.
Author_Institution :
Dept. of Comput. Sci. & Eng., Indian Inst. of Technol. Guwahati, Guwahati, India
Abstract :
Due to the non-uniform distribution of the memory accesses for today´s applications some sets of the cache are heavily used while some other sets remain underutilized. CMP-VR is an approach to dynamically increase the associativity of heavily used sets without increasing the cache size. It achieves this by reserving certain number of ways in each set to be shared with other sets and the remaining are private to the set. These shared ways from all sets form common reserve storage, while the private ways form the normal storage. In both the partitions it uses LRU replacement policy. This paper presents an optimization on CMP-VR by removing the LRU policy from the normal storage of the set. A victim from this normal storage can reside in the reserved/shared area and will get evicted from here using the LRU policy. Thus our optimization does not hamper cache performance. At the same time it helps to remove the complexity of implementing true LRU. Storage analysis shows 7-18% reduction in the replacement cost. CPI and miss rate also improve by 4% and 16% respectively for a 4MB 8 way associative LLC.
Keywords :
cache storage; microprocessor chips; multiprocessing systems; CMP-VR approach; LRU replacement policy; associative LLC; cache performance; chip multiprocessors; last level cache; least recently used replacement policy; normal storage; reduced overhead replacement policy; reserve storage; storage analysis; victim retention approach; Benchmark testing; Lead; LRU; NUCA; Pseudo-LRU; Random-LRU; Tiled CMP;
Conference_Titel :
Electronics and Communication Systems (ICECS), 2014 International Conference on
Conference_Location :
Coimbatore
Print_ISBN :
978-1-4799-2321-2
DOI :
10.1109/ECS.2014.6892636