DocumentCode :
2285042
Title :
The design of a 55SPECint92 RISC processor under 2W
Author :
Yeung, N.K. ; Sutu, Y.-H. ; Su, T.Y.-F. ; Pak, E.T. ; Chao, C.-C. ; Akki, S. ; Yau, D.D. ; Lodenquai, R.
Author_Institution :
MIPS Technol. Inc., Mountain View, CA, USA
fYear :
1994
fDate :
16-18 Feb. 1994
Firstpage :
206
Lastpage :
207
Abstract :
This 64b RISC processor is targeted for the portable, desktop, and embedded applications. The low-cost, high-performance CMOS processor achieves 55SPECint92 while consuming only 1.8 W. A previous design provided a performance of 36.8 SPECint92 at 50 MHz and consumed 12.5 W.<>
Keywords :
CMOS integrated circuits; microprocessor chips; real-time systems; reduced instruction set computing; 1.8 W; 55SPECint92; 64 bit; CMOS; RISC processor; desktop applications; embedded applications; high-performance processor; portable applications; Circuits; Clocks; Energy consumption; Frequency; Logic design; Microprocessors; Power dissipation; Power measurement; Reduced instruction set computing; Semiconductor device measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 1994. Digest of Technical Papers. 41st ISSCC., 1994 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-1844-7
Type :
conf
DOI :
10.1109/ISSCC.1994.344668
Filename :
344668
Link To Document :
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