DocumentCode :
2285056
Title :
Different designs of TSVs for 3D IC: Signal integrity analysis with cascaded scattering matrix
Author :
Liu, En-Xiao ; Lee, Hui Min ; Wei, Xing-Chang ; Li, Er-Ping
Author_Institution :
Electron. & Photonic Dept., A*STAR Inst. of High Performance Comput., Singapore, Singapore
fYear :
2011
fDate :
12-14 Dec. 2011
Firstpage :
1
Lastpage :
4
Abstract :
Through silicon vias (TSV) are critical vertical interconnects in 3D IC. We comparatively studied the signal integrity of different designs of TSVs both existing and new in a single die up to 20 GHz. For TSVs in multiple die stacking, we proposed to use the cascaded scattering matrix approach for their signal integrity analysis. The results are validated against those from full-path simulation. Compared to full-path simulation by a full-wave approach, the cascaded approach reduces simulation time and memory usage.
Keywords :
circuit simulation; integrated circuit design; integrated circuit interconnections; three-dimensional integrated circuits; 3D IC; TSV design; cascaded scattering matrix approach; frequency 20 GHz; full-path simulation; full-wave approach; multiple die stacking; signal integrity analysis; through silicon vias; vertical interconnect; Insertion loss; Scattering; Silicon; Stacking; Substrates; Three dimensional displays; Through-silicon vias;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), 2011 IEEE
Conference_Location :
Hanzhou
ISSN :
2151-1225
Print_ISBN :
978-1-4673-2288-1
Electronic_ISBN :
2151-1225
Type :
conf
DOI :
10.1109/EDAPS.2011.6213805
Filename :
6213805
Link To Document :
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