Title :
A 256 Mb DRAM with 100 MHz serial I/O ports for storage of moving pictures
Author :
Kotani, H. ; Akamatsu, H. ; Naito, Y. ; Fujii, T. ; Iwata, T. ; Tsuji, T. ; Asaka, H. ; Itoh, Y. ; Shimizu, N. ; Hirase, J. ; Shibata, Y. ; Yamashita, K. ; Hori, T. ; Fujita, T.
Author_Institution :
Matsushita Commun. Ind. Co. Ltd., Osaka, Japan
Abstract :
A 256 Mb memory can store 171s of NTSC video data using the MPEG1 method. The application-oriented 256 Mb CMOS DRAM reported here is suitable for the storage of moving pictures, with low power (73 mA at 100 MHz), refresh-free-FIFO function, and 16b serial I/O ports. The chip has: (1) suppressed high-level differential transfer, (2) lower voltage level pre-charge, (3) divided operation of array circuits for serial access, and (4) self refresh during a serial read/write.<>
Keywords :
CMOS integrated circuits; DRAM chips; video equipment; video signals; 100 MHz; 256 Mbit; 73 mA; CMOS DRAM; MPEG1 method; NTSC video data; moving picture storage; refresh-free-FIFO function; self refresh; serial I/O ports; suppressed high-level differential transfer; voltage level precharge; Capacitance; Driver circuits; HDTV; MOS devices; Quantum cascade lasers; Random access memory; Switches; Toy industry; Variable structure systems; Voltage;
Conference_Titel :
Solid-State Circuits Conference, 1994. Digest of Technical Papers. 41st ISSCC., 1994 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-1844-7
DOI :
10.1109/ISSCC.1994.344696
