Title :
Low-voltage CMOS device scaling
Author_Institution :
California Univ., Berkeley, CA, USA
Abstract :
Discussions of device scaling are often based on simplistic device models. Much more accurate models have become available recently but remain largely unknown to the circuit and design community. This paper highlights some of these models by projecting low-voltage CMOS device trends.<>
Keywords :
insulated gate field effect transistors; semiconductor device models; circuit design; device models; low-voltage CMOS device scaling; Capacitance; Clocks; Delay; Equations; Inverters; MOSFET circuits; SPICE; Semiconductor device modeling; Silicon on insulator technology; Voltage;
Conference_Titel :
Solid-State Circuits Conference, 1994. Digest of Technical Papers. 41st ISSCC., 1994 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-1844-7
DOI :
10.1109/ISSCC.1994.344716
