DocumentCode :
2285923
Title :
Buffer Space Optimisation with Communication Synthesis and Traffic Shaping for NoCs
Author :
Manolache, Sorin ; Eles, Petru ; Peng, Zebo
Author_Institution :
Linkoping Univ.
Volume :
1
fYear :
2006
fDate :
6-10 March 2006
Firstpage :
1
Lastpage :
6
Abstract :
This paper addresses communication optimisation for applications implemented on networks-on-chip. The mapping of data packets to network links and the timing of the release of the packets are critical for avoiding destination contention. This reduces the demand for communication buffers with obvious advantages in chip area and energy savings. We propose a buffer need analysis approach and a strategy for communication synthesis and packet release timing with minimum communication buffer demand that guarantees worst-case response times
Keywords :
buffer circuits; circuit optimisation; integrated circuit design; logic design; network-on-chip; buffer need analysis; buffer space optimisation; communication buffers; communication optimisation; communication synthesis; data packets; destination contention; network links; network-on-chip; packet release timing; traffic shaping; Buffer overflow; Communication switching; Context; Delay; Energy consumption; Network synthesis; Network-on-a-chip; Switches; Telecommunication traffic; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation and Test in Europe, 2006. DATE '06. Proceedings
Conference_Location :
Munich
Print_ISBN :
3-9810801-1-4
Type :
conf
DOI :
10.1109/DATE.2006.244069
Filename :
1656981
Link To Document :
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