Title :
Performance evaluation of novel low leakage Double-gate FinFET device at sub-22nm with LaAlO3 high-k gate oxide and TiN metal gate using quantum modeling
Author :
Subramaniam, Subha ; Joshi, Sangeeta M. ; Awale, R.N.
Author_Institution :
Dept. of Electr. Eng., VJTI, Mumbai, India
Abstract :
The impact of metal gate work function on the device performance of 22 nm Double-gate FinFET with SiO2 and high-k gate oxide LaAlO3 is studied over a wide range of work functions. Matlab is used to calculate equivalent oxide thickness of high-k material LaAlO3 and simulations are carried out in PADRE device simulator. Quantum-mechanical effects such as Band to Band Tunnelling, Band Gap Narrowing, Carrier-Carrier Scattering are taken care of in the simulation by including the nonlinear drift velocity model and Lombardi´s transverse field dependent mobility model. We propose a novel device with high-k LaAlO3 and the metal gate TiN. Our results show improvement in on-current, transconductance and degradation in the short channel effects DIBL and subthreshold swing. Using matlab the effect of fin width and underlap length on the fringing capacitance of DG-FinFET is also simulated. To achieve low leakage, optimizations of fin width and underlap length are done via simulations. From our results we propose that a fin width in the range of 6nm-8nm and an underlap length of 3nm are suitable for the novel DG-FinFET structure at 22nm gate length with high-k LaAlO3 and metal gate TiN.
Keywords :
MOSFET; capacitance; energy gap; lanthanum compounds; quantum gates; titanium compounds; DG-FinFET structure; DIBL; LaAlO3-TiN; Lombardi transverse field dependent mobility model; PADRE device simulator; band gap narrowing; band to band tunnelling; carrier-carrier scattering; fin width optimization; fringing capacitance; high-k gate oxide; high-k material; low leakage double-gate FinFET device; metal gate work function; nonlinear drift velocity model; quantum modeling; quantum-mechanical effects; short channel effects; size 22 nm; subthreshold swing; transconductance; CMOS integrated circuits; Capacitance; FinFETs; Logic gates; Performance evaluation; Tin; DG-FinFET; fin width; fringing capacitance; high-k; metal gate;
Conference_Titel :
Electronics and Communication Systems (ICECS), 2014 International Conference on
Conference_Location :
Coimbatore
Print_ISBN :
978-1-4799-2321-2
DOI :
10.1109/ECS.2014.6892692