Title :
Recycled Error Bits: Energy-Efficient Architectural Support for Floating Point Accuracy
Author :
Nathan, Ralph ; Anthonio, Bryan ; Shih-Lien Lu ; Naeimi, Helia ; Sorin, Daniel J. ; Sun, Xinghua
Abstract :
In this work, we provide energy-efficient architectural support for floating point accuracy. For each floating point addition performed, we "recycle" that operation\´s rounding error. We make this error architecturally visible such that it can be used, whenever desired, by software. We also design a compiler pass that allows software to automatically use this feature. Experimental results on physical hardware show that software that exploits architecturally recycled error bits can (a) achieve accuracy comparable to a 64-bit FPU with performance and energy that are comparable to a 32-bit FPU, and (b) achieve accuracy comparable to an all-software scheme for 128-bit accuracy with far better performance and energy usage.
Keywords :
floating point arithmetic; hardware-software codesign; performance evaluation; program compilers; recycling; FPU; all-software scheme; architecturally recycled error bits; compiler pass; energy-efficient architectural support; floating point accuracy; floating point addition; operation rounding error; recycled error bits; Accuracy; Assembly; Benchmark testing; Hardware; Instruments; Registers; Software; innovative hardware/software co-design; linear and nonlinear systems; numerical methods;
Conference_Titel :
High Performance Computing, Networking, Storage and Analysis, SC14: International Conference for
Conference_Location :
New Orleans, LA
Print_ISBN :
978-1-4799-5499-5