Title :
A Novel Approach for Branch Buffer Consuming Power Reduction
Author :
Zamani, Behzad ; Adeli, Ehsan ; Gharedaghi, Haleh ; Soryani, Mohsen
Author_Institution :
Eng. Dept., Islamic Azad Univ., Tehran
Abstract :
By increasing the pipeline length in processors, the accuracy of the branch predictor unit plays an important role in processors efficiencies. In addition to the accuracy, consuming power is also an essential in portable systems. Therefore, in the processors these days the prediction unit is used to determine the branch destination, while most of these accesses are not necessary. In this paper, a method is proposed to reduce the consuming power in the jump prediction unit. In this proposed method, the non-necessary accesses to BTB are reduced by taking into account this fact that there exists distances between different consecutive branch instructions. This method decides the access to BTB by a constant value and a counter. After an instruction entrance, the BTB is accessed if the counter is zero, and if the instruction is a branch instruction and exists in the BTB the counter is reset. The simulation and experimental results illustrate the suitable performance of the proposed method in comparisons to the other methods. This superiority is for both the execution time and for the consuming power. Also it is more strengthened by increasing the distance.
Keywords :
buffer storage; program compilers; branch buffer; branch destination; branch predictor unit; jump prediction unit; power reduction; Cache memory; Clocks; Counting circuits; Energy consumption; History; Pipelines; Power engineering and energy; Power engineering computing; Synchronization; Branch Target Buffer; Consuming Power Reduction; Next Branch Distance; Prediction History Table;
Conference_Titel :
Computer and Electrical Engineering, 2008. ICCEE 2008. International Conference on
Conference_Location :
Phuket
Print_ISBN :
978-0-7695-3504-3
DOI :
10.1109/ICCEE.2008.48