• DocumentCode
    228660
  • Title

    Enhancement of multiple parallel assay operations with cross contamination avoidance in a given biochip

  • Author

    Dhal, Debasis ; Datta, Piyali ; Chakrabarty, Arpan ; Pal, Rajat Kumar

  • Author_Institution
    Dept. of Inf. Technol., Assam Univ., Silchar, India
  • fYear
    2014
  • fDate
    13-14 Feb. 2014
  • Firstpage
    1
  • Lastpage
    7
  • Abstract
    Digital microfluidic biochips are restructuring many areas of Biochemistry, Biomedical sciences, and Microelectronics. It is also known as `Lab-on-a-Chip´ for its recognition as a substitute for laboratory experiments. In recent times, due to emergency and cost efficacy, more than one assay operations are required to be performed at the same time. So, parallelism is a must in designing biochips. Having an area of a given chip as a constraint, how efficiently we can use a restricted sized chip and how much parallelism can be built-in are the objectives of this paper. A specific application of an assay may characterize a sample where, say only one type of reagent and multiple samples have been considered, or vice versa, and identify some parameter(s) of the sample(s) under requirement in parallel. In our experimentation, we essentially do this task in parallel for five such sets of subregions of a given restricted sized chip in digital microfluidics using an array based partitioning pin assignment technique, where cross contamination problem has also been considered, and efficiency of proper taxonomy of a given sample has also been improved.
  • Keywords
    bioMEMS; biochemistry; lab-on-a-chip; microfluidics; array based partitioning pin assignment technique; assay operations; biochemistry; biochip designing; biomedical sciences; cross contamination avoidance; cross contamination problem; digital microfluidic biochips; lab-on-a-chip; laboratory experiments; microelectronics; multiple parallel assay operation enhancement; multiple samples; reagent; restricted sized chip; subregions; taxonomy; Biology; Ink; Parallel processing; Roads; Silicon; Synchronization; Algorithm; Cross contamination; Design automation; Lab-on-a-chip; Parallelism; Pin constrained design; Reagent; Sample; Wash droplet;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics and Communication Systems (ICECS), 2014 International Conference on
  • Conference_Location
    Coimbatore
  • Print_ISBN
    978-1-4799-2321-2
  • Type

    conf

  • DOI
    10.1109/ECS.2014.6892723
  • Filename
    6892723