Enabling self-reconfiguration on a video processing platform

FPGA implementations of complex image processing algorithms are often limited in flexibility and by the amount of available chip resources. This article presents a hardware design of an adaptive self-reconfigurable video processing platform. Dynamic self-reconfiguration increases a designpsilas flexibility and enables the use of FPGAs with a fraction of resources actually needed by the algorithm. As a case study two implementation approaches of a complex frame-grabber with a set of dynamically reconfigurable kernels are evaluated and further improvements are outlined.