Title :
A model-driven validation & verification environment for embedded systems
Author :
Gargantini, A. ; Riccobene, E. ; Scandurra, P.
Author_Institution :
DIIMM, Univ. di Bergamo, Bergamo
Abstract :
This paper presents a validation and verification tool component, based on the abstract state machine formal method, that we are developing to support high level formal analysis of embedded system model-driven design. This component is integrated into a model-driven environment for HW/SW co-design that provides a graphical high-level representation of HW and SW components by means of UML profiles for SystemC/multi-thread C, and allows C/C++/SystemC code generation/back-annotation from/to graphical UML models.
Keywords :
C++ language; Unified Modeling Language; embedded systems; formal verification; hardware-software codesign; multi-threading; program compilers; C++ language; HW/SW codesign; SystemC; abstract state machine; embedded system; formal analysis; formal method; graphical UML model; graphical high-level representation; model-driven design; model-driven environment; model-driven validation; model-driven verification; multithread C language; Application software; Computer architecture; Diffusion tensor imaging; Embedded system; Hardware; Industrial control; Job shop scheduling; Standardization; Timing; Unified modeling language;
Conference_Titel :
Industrial Embedded Systems, 2008. SIES 2008. International Symposium on
Conference_Location :
Le Grande Motte
Print_ISBN :
978-1-4244-1994-4
Electronic_ISBN :
978-1-4244-1995-1
DOI :
10.1109/SIES.2008.4577708
