VLSI implementation of hybrid QR code generation system

Author

Ramya, M. ; Sheela, M. Jaya

Author_Institution

Kalaignar Karunanidhi Inst. of Technol., Coimbatore, India

fYear

2014

fDate

13-14 Feb. 2014

Firstpage

1

Lastpage

6

Abstract

A new high-speed, high-accuracy Field programmable gate array (FPGA) based method for generating QR Code for various text sizes had been proposed. This is carried out by exploiting the spectral density of cyan, magenta and yellow colours. Here forward error correction method is used for correcting the errors while converting the data into bits and blocks. The two main coders used for forward error correction is Reed Solomon (RS) and convolution code. At the same time, an efficient QR code which is capable to deal with more complex distortion, than other codes. The QR code is generated from mask pattern generation. The major advantage of the proposed system is data can be retained for long time and can be used mostly in stenography.

Keywords

Reed-Solomon codes; VLSI; bar codes; codecs; convolutional codes; field programmable gate arrays; forward error correction; program compilers; FPGA; RS code; Reed Solomon code; VLSI implementation; coders; convolution code; cyan colour; forward error correction method; high-speed high-accuracy field programmable gate array; hybrid QR code generation system; magenta colour; mask pattern generation; quick response code; spectral density; stenography; two-dimensional barcode; yellow colour; Analytical models; Field programmable gate array (FPGA); Reed Solomon(RS);

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics and Communication Systems (ICECS), 2014 International Conference on

Conference_Location

Coimbatore

Print_ISBN

978-1-4799-2321-2

Type

conf

DOI

10.1109/ECS.2014.6892829

Filename

6892829