ASIP Design and Synthesis for Non Linear Filtering in Image Processing

Author

Fanucci, L. ; Cassiano, M. ; Saponara, S. ; Kammler, D. ; Witte, E.M. ; Schliebusch, O.

Author_Institution

DIIEIT, Pisa Univ.

Volume

2

fYear

2006

fDate

6-10 March 2006

Firstpage

1

Lastpage

6

Abstract

This paper presents an application specific instruction set processor (ASIP) design for the implementation of a class of nonlinear image processing algorithms, the Retinex-like filters. Starting from high level descriptions, first algorithmic optimization is accomplished. Then a processor architecture and an instruction set are customized with special respect to the algorithmic computations in order to achieve the specified timing at reasonable complexity. Taking advantage of the programmability of processor architectures, the flexibility of the system is increased, involving e.g. dynamic parameter adjustment and color treatment. ASIP implementation results in 0.13 mum CMOS technology are presented

Keywords

CMOS integrated circuits; coprocessors; image processing; instruction sets; nonlinear filters; system-on-chip; 0.13 micron; ASIP; CMOS technology; Retinex-like filter; application specific instruction set processor; high level description; nonlinear filtering; nonlinear image processing algorithms; Algorithm design and analysis; Application specific processors; CMOS technology; Computer aided instruction; Computer architecture; Image processing; Maximum likelihood detection; Nonlinear filters; Process design; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Design, Automation and Test in Europe, 2006. DATE '06. Proceedings

Conference_Location

Munich

Print_ISBN

3-9810801-1-4

Type

conf

DOI

10.1109/DATE.2006.243908

Filename

1657146