DocumentCode
2289398
Title
A new phase-locked loop (PLL) system
Author
Karimi-Ghartemani, M. ; Iravani, M.R.
Author_Institution
Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada
Volume
1
fYear
2001
fDate
2001
Firstpage
421
Abstract
An enhanced phase-locked loop (PLL) system is presented and its properties and performance characteristics are investigated. Advantages of the proposed PLL structure over the conventional PLLs including its capability of direct estimation of amplitude and phase angle of its input signal, within a wide range of parameters, are demonstrated. Main features of the proposed PLL are structural simplicity and performance robustness. Performance of the PLL, based on both analog and digital realization, is also presented
Keywords
amplitude estimation; circuit stability; phase estimation; phase locked loops; amplitude estimation; analog realization; digital realization; direct estimation; enhanced PLL system; performance characteristics; performance robustness; phase angle estimation; phase detection; phase-locked loop system; stability analysis; Amplitude estimation; Filters; Phase detection; Phase estimation; Phase locked loops; Phase measurement; Power electronics; Signal generators; Strontium; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2001. MWSCAS 2001. Proceedings of the 44th IEEE 2001 Midwest Symposium on
Conference_Location
Dayton, OH
Print_ISBN
0-7803-7150-X
Type
conf
DOI
10.1109/MWSCAS.2001.986202
Filename
986202
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