DocumentCode
2290024
Title
VLSI implementation of a high speed block-cipher module
Author
Shehata, Khaled A. ; Ali, Haem H. ; Shaker, Nabil H. ; Morsy, Khaled M.
Volume
2
fYear
2001
fDate
2001
Firstpage
572
Abstract
Encrypting digital bit stream is a vital measure to secure digital communications. In this paper, a novel CMOS VLSI architecture based on a new algorithm for a 16-bit encryption/decryption module is designed and implemented. Multiples of the new implemented modules may be concatenated in parallel or in series resulting in either a faster block cipher system or a sophisticated yet more secured cipher system
Keywords
CMOS digital integrated circuits; VLSI; block codes; cryptography; high-speed integrated circuits; integrated circuit design; modules; CMOS VLSI architecture; XOR combiner; encryption/decryption module; high speed block-cipher module; input block register; CMOS technology; Circuits; Clocks; Cryptography; Data security; Educational institutions; Equations; Military communication; Registers; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2001. MWSCAS 2001. Proceedings of the 44th IEEE 2001 Midwest Symposium on
Conference_Location
Dayton, OH
Print_ISBN
0-7803-7150-X
Type
conf
DOI
10.1109/MWSCAS.2001.986256
Filename
986256
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