A new test structure for short and long distance mismatch characterization of submicron MOS transistors

Author

Conti, M. ; Crippa, P. ; Orcioni, S. ; Turchetti, C. ; Ricciardi, F. ; Vece, G.B.

Author_Institution

Dipt. di Elettronica e Autom., Ancona Univ., Italy

Volume

2

fYear

2001

fDate

2001

Firstpage

656

Abstract

A new test structure for the characterization of statistical variations of the parameters of submicron MOS devices is presented in this work. The structure has been designed for the estimation of mismatch parameters as a function of the device dimensions and positions in the die. Low area consumption and a reduced measurement time required for the complete mismatch characterization are the main objective of the design. The test structure consisting of about 6000 MOSFETs has been used for mismatch characterization of a 0.18 μm CMOS technology

Keywords

MOSFET; semiconductor device measurement; semiconductor device testing; statistical analysis; 0.18 micron; CMOS technology; MOSFETs; device dimensions; low area consumption; measurement time; mismatch characterization; mismatch parameters; statistical variations; submicron MOS transistors; test structure; Area measurement; Automatic testing; Circuit testing; Decoding; Differential amplifiers; Electrical resistance measurement; MOS devices; MOSFET circuits; Semiconductor device modeling; Time measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2001. MWSCAS 2001. Proceedings of the 44th IEEE 2001 Midwest Symposium on

Conference_Location

Dayton, OH

Print_ISBN

0-7803-7150-X

Type

conf

DOI

10.1109/MWSCAS.2001.986274

Filename

986274