Electronic design automation (EDA) flow for development of an ARM Processor-based silicon-on-insulator (SOI) SoC

In mid 2008 ARM^reg began development of an ARM Processor-based SoC that was intended to show the feasibility and benefits of using ARM 45 nm SOI silicon-on-insulator (SOI)- based standard cells, memories and I/Os using a standard RTL-based design flow. An RTL-based processor SoC design was implemented and signed-off using a typical Synopsys design flow, with only a few minor SOI-related considerations, mostly surrounding margining, using additional corners in the SOI library. Even though the design team had no previous SOI design experience, they were able to deliver a high-quality SoC in SOI silicon, with better quality of results than a comparable bulk silicon design, using the same results and schedule as a comparable bulk silicon design. Specific quality of results and comparisons are provided by ARM in a separate paper.