SliM-II: a linear array SIMD processor for real-time image processing

This paper describes architectures and design of a linear array processor chip called a SliM-II Image Processor. The chip has a linear array of 64 processing elements (PEs). In contrast to existing array processors, each PE has a multiplier that is quite effective for convolution, template matching, etc. The instruction set can execute an ALU, a data I/O, and an inter-PE communication operations simultaneously in an instruction cycle. In addition, during the ALU/multiplier operation, SliM-II provides parallel data load/store between the register file and on-chip memory as in DSP chips. The SliM-II contains about 1.5 million transistors in a 13.2×13.0 mm² core size and the package type is 208 pin PQ2. The performance estimation shows a significant improvement for algorithms requiring multiplications compared with existing array processors