Texture coder design of MPEG4 video by using interleaving schedule

For MPEG-4 texture coding, an efficient Interleaving DCT and IDCT Schedule (IDIS) is proposed. With this scheme, the DCT-Q-IQ-IDCT coding loop can be implemented with no buffers and least latency, which in turn makes the number of buffers for MC a minimum of two. Also by the characteristics of IDIS, a substructure sharing technique is applied for DC/AC prediction with Q and IQ to reduce hardware cost further. All the functions are integrated to comprise the block engine for texture coding operations in the MPEG-4 video standard. For a encoding sequence of 720×480 at 30 fps, real-time requirement can be achieved at 54 MHz. The proposed scheduling can be further applied to other video coding standards for a cost-effective SOC implementation.