Title :
Multilevel monolithic 3D inductors on silicon
Author :
Son, Ju-Ho ; Kim, Sun-Hong ; Choi, Seok-Woo ; Rho, Do-Hwan ; Kim, Dong-Yong
Author_Institution :
Div. of Electron. & Inf. Eng., Chonbuk Nat. Univ., Chonju, South Korea
Abstract :
This paper has been the analysis of passive devices in Si RF and microwave. Multilevel monolithic 3D inductors implemented in a standard CMOS technology are presented. Since on-chip inductors are constrained to be planar, the typical solution is to form a spiral. Proposed inductors are composed of 3D structures requiring no extra processing steps. Inductances are higher in increasing the mutual inductance besides the self-inductance. In this reason, this structure gives rise to a quality factor Q and a inductance using 3D geometry in small areas
Keywords :
CMOS integrated circuits; Q-factor; elemental semiconductors; inductors; silicon; CMOS technology; RF IC; Si; inductance; microwave substrate; multilevel monolithic 3D inductor; mutual inductance; passive device; quality factor; self-inductance; silicon chip; Bipolar integrated circuits; CMOS technology; Inductance; Inductors; Q factor; Radio frequency; Radiofrequency integrated circuits; Silicon; Spirals; Turning;
Conference_Titel :
Circuits and Systems, 2001. MWSCAS 2001. Proceedings of the 44th IEEE 2001 Midwest Symposium on
Conference_Location :
Dayton, OH
Print_ISBN :
0-7803-7150-X
DOI :
10.1109/MWSCAS.2001.986321
