DocumentCode
2291564
Title
Fabrication of compressively-strained GeOI substrates using the Smart CutTM technology
Author
Augendre, E. ; Sanchez, L. ; Hartmann, J.-M. ; Van Den Daele, W. ; Favier, S. ; Guiot, E. ; Ghyselen, B. ; Bourdelle, K.K. ; Cristoloveanu, S. ; Billon, T. ; Clavelier, L.
Author_Institution
CEA, Minatec, Grenoble, France
fYear
2009
fDate
5-8 Oct. 2009
Firstpage
1
Lastpage
2
Abstract
Compressively-strained germanium-on-insulator (c-GeOI) substrates have been fabricated using the Smart Cuttrade technology. The technique is based on the optimized epitaxial growth process that reduces the threading dislocation density (TDD) in the strained Ge layer to the levels of 8middot105 /cm2. Pseudo-MOSFET characterization showed 67% hole mobility enhancement with respect to conventional GeOI (150% relative to SOI).
Keywords
MOSFET; epitaxial growth; hole mobility; silicon-on-insulator; Ge; SOI; compressively-strained GeOI substrates; germanium-on-insulator substrate; hole mobility enhancement; optimized epitaxial growth process; pseudo-MOSFET characterization; smart cut technology; threading dislocation density; Epitaxial growth; Epitaxial layers; Fabrication; Germanium; Lattices; Leakage current; Rough surfaces; Silicon; Substrates; Surface roughness;
fLanguage
English
Publisher
ieee
Conference_Titel
SOI Conference, 2009 IEEE International
Conference_Location
Foster City, CA
ISSN
1078-621X
Print_ISBN
978-1-4244-4256-0
Electronic_ISBN
1078-621X
Type
conf
DOI
10.1109/SOI.2009.5318768
Filename
5318768
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