DocumentCode
2291788
Title
Impact of FinFET technology on 6T-SRAM performance
Author
O´uchi, S. ; Nakagawa, T. ; Matsukawa, T. ; Liu, Y.X. ; Endo, K. ; Sekigawa, T. ; Sakamoto, K. ; Koike, H. ; Masahara, M.
Author_Institution
Nanoelectron. Res. Inst., Nat. Inst. of Adv. Ind. Sci. & Technol. (AIST), Tsukuba, Japan
fYear
2009
fDate
5-8 Oct. 2009
Firstpage
1
Lastpage
2
Abstract
The area penalty, operation stability, and operation speed of the 20-nm-ZG FinFET SRAM were compared to those of the 20-nm-ZG bulk-planar SRAM. The FinFET SRAM with beta-ratio of 1 is expected to realize not only 7% less area penalty, but also the same or superior operational stability to that of the bulk-planar SRAM with beta-ratio of 2 because of less variability of the device performance. Also, it is expected that the operation speed of the FinFET SRAM is twice faster than that of the bulk planar SRAM.
Keywords
MOS integrated circuits; SRAM chips; 6T-SRAM array; FinFET SRAM; area penalty; bulk-planar SRAM; operation speed; operation stability; CMOS technology; Capacitance; Delay; FinFETs; Nanoelectronics; Random access memory; SPICE; Semiconductor device modeling; Stability; Transient analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
SOI Conference, 2009 IEEE International
Conference_Location
Foster City, CA
ISSN
1078-621X
Print_ISBN
978-1-4244-4256-0
Electronic_ISBN
1078-621X
Type
conf
DOI
10.1109/SOI.2009.5318783
Filename
5318783
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