• DocumentCode
    2293499
  • Title

    A High-Throughput Multi-cluster NoC Architecture

  • Author

    Freitas, Henrique C. ; Navaux, Philippe O A

  • Author_Institution
    Grad. Program in Comput. Sci., Univ. Fed. do Rio Grande do Sul, Rio Grande
  • fYear
    2008
  • fDate
    16-18 July 2008
  • Firstpage
    56
  • Lastpage
    63
  • Abstract
    During the last years a large number of research works has focused on problems related to multi-core processors. Due to the possibilities of many cores, the number of opportunities in high performance computing (HPC) has grown a lot. In fact, new fields related to HPC and processor architecture increase the future possibilities of a grid-on-chip (GoC). The goal of this paper is to show a high-throughput MCNoC (multi-cluster network-on-chip) as an alternative architecture to support clusters of cores and grid features. In this new scenario data throughput, flexibility, and scalability are very important. The results verify that MCNoC has a similar area occupation and a better data throughput than a traditional network-on-chip.
  • Keywords
    multiprocessing systems; network-on-chip; grid-on-chip; high performance computing; high-throughput MCNoC; high-throughput multi-cluster NoC architecture; multi-cluster network-on-chip; multi-core processors; Computer architecture; Distributed computing; High performance computing; Multicore processing; Multithreading; Network-on-a-chip; Parallel processing; Surface-mount technology; Throughput; Yarn;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computational Science and Engineering, 2008. CSE '08. 11th IEEE International Conference on
  • Conference_Location
    Sao Paulo
  • Print_ISBN
    978-0-7695-3193-9
  • Type

    conf

  • DOI
    10.1109/CSE.2008.59
  • Filename
    4578216