DocumentCode :
2295235
Title :
Optimum implementation of a multistage IIR SC bandpass decimator for a voiceband analogue interface system
Author :
Martins, R.P. ; Franca, J.E.
Author_Institution :
Dept. de Engenharia Electrotecnica e de Computadores, Inst. Superior Tecnico, Lisboa, Portugal
fYear :
1988
fDate :
7-9 June 1988
Firstpage :
1661
Abstract :
A novel methodology has been developed for the design of multistage infinite impulse response switched-capacitor decimators with optimum implementation. The approach uses a cascade of only IIR SC decimator building blocks as a means of obtaining minimum-order structures for high selectivity filtering requirements with very large factors of sampling rate reduction. The strategy for reducing the sampling rate is determined in conjunction with the pole-zero pairing to achieve relaxed speed requirements for the operational amplifiers together with reduced capacitance spread and total capacitor area. This is demonstrated for an SC bandpass decimator which virtually eliminates the need for costly on-chip continuous-time filters, thus making it extremely attractive for integrated-circuit implementation.<>
Keywords :
band-pass filters; digital filters; digital integrated circuits; poles and zeros; switched capacitor filters; integrated-circuit implementation; minimum-order structures; multistage infinite impulse response switched-capacitor decimators; operational amplifiers; pole-zero pairing; sampling rate reduction; voiceband analogue interface system; Baseband; Capacitance; Capacitors; Filtering; Finite impulse response filter; Frequency; IIR filters; Prototypes; Sampling methods; Transfer functions;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1988., IEEE International Symposium on
Conference_Location :
Espoo, Finland
Type :
conf
DOI :
10.1109/ISCAS.1988.15253
Filename :
15253
Link To Document :
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