DocumentCode
2295897
Title
An area effective standard cell based channel decoder LSI for digital satellite TV broadcasting
Author
Kamada, Takehiro ; Fukuoka, Toshihiko ; Nakai, Yuji ; Nakakura, Yasuhiro ; Ueda, Katsuhiko ; Ota, Kazuhiro ; Shiomi, Tomonori ; Fukumoto, Yoshihiko
Author_Institution
Semicond. Res. Center, Matsushita Electr. Ind. Co. Ltd., Osaka, Japan
fYear
1996
fDate
30 Oct-1 Nov 1996
Firstpage
337
Lastpage
346
Abstract
A new channel decoder LSI, which will be used in digital satellite TV broadcasting set-top boxes, has been designed. This LSI´s functions include AD/DA conversion, QPSK demodulation, Viterbi decoding, frame synchronization, convolutional deinterleaving, Reed-Solomon (RS) decoding, and descrambling. We use a new method for Viterbi decoding called the tracking survivor state information (TSSI) method, which not only reduces power consumption, but also solves the problem of increasing memory size. To reduce the size of the RS decoder circuit, we used a three-stage-pipeline structure as well as designed a new architecture to realize the Euclid algorithm. This device has been fabricated in a 0.35 μm 3-metal CMOS standard cell-based process and is composed of 670 K transistors. We describe the TSSI method of the Viterbi decoder and the Reed-Solomon decoder´s new 3-stage pipeline architecture
Keywords
CMOS digital integrated circuits; Reed-Solomon codes; Viterbi decoding; analogue-digital conversion; demodulation; digital radio; digital signal processing chips; digital-analogue conversion; direct broadcasting by satellite; large scale integration; pipeline processing; quadrature phase shift keying; synchronisation; television broadcasting; 0.35 micron; 3-metal CMOS standard cell; AD/DA conversion; Euclid algorithm; QPSK demodulation; RS decoder circuit; Reed-Solomon decoder; Reed-Solomon decoding; Viterbi decoder; Viterbi decoding; area effective standard cell; channel decoder LSI; convolutional deinterleaving; descrambling; digital satellite TV broadcasting; frame synchronization; memory size; power consumption reduction; set-top boxes; three-stage-pipeline structure; tracking survivor state information; transistors; Circuits; Decoding; Demodulation; Energy consumption; Large scale integration; Quadrature phase shift keying; Reed-Solomon codes; Satellite broadcasting; TV broadcasting; Viterbi algorithm;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Signal Processing, IX, 1996., [Workshop on]
Conference_Location
San Francisco, CA
Print_ISBN
0-7803-3134-6
Type
conf
DOI
10.1109/VLSISP.1996.558366
Filename
558366
Link To Document