DocumentCode :
2296380
Title :
Power Computation in FPGA Based Local Interconnect Network (LIN)
Author :
Hajare, Shital ; Khanapurkar, Milind
Author_Institution :
Electron. Dept., G.H. Raisoni Coll. of Eng., Nagpur, India
fYear :
2010
fDate :
19-21 Nov. 2010
Firstpage :
717
Lastpage :
720
Abstract :
FPGA based local Interconnect Network (LIN) is mainly used for space-based and vehicular applications. The power consumption has become a design parameter equally as challenging as throughput. Available FPGA synthesis and routing tools optimize for speed or area, but not for realtime power consumption. Power computation is the first step in achieving power optimization. The work presented in paper is computation & analyzing of the Power Consumption by LIN Controller and Two Node LIN in Master-Slave Configuration. The Power consumption is optimized by code optimization which allows the designer to acquire a better understanding of how power consumption is generated and distributed.
Keywords :
automotive electronics; field programmable gate arrays; integrated circuit interconnections; system buses; FPGA based local interconnect network; LIN controller; code optimization; master-slave configuration; power computation; power consumption; power optimization; space-based application; vehicular application; FPGA- Field Programmable Gate Arrays; LINLocal;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Emerging Trends in Engineering and Technology (ICETET), 2010 3rd International Conference on
Conference_Location :
Goa
ISSN :
2157-0477
Print_ISBN :
978-1-4244-8481-2
Electronic_ISBN :
2157-0477
Type :
conf
DOI :
10.1109/ICETET.2010.175
Filename :
5698420
Link To Document :
بازگشت