A fine-grain, current mode scheme for VLSI proximity search engine

A Proximity Search Engine (PSE) which finds neighboring vectors of a specific input vector is used in various important applications such as neural network-based recognition systems, vector quantizers (VQ) and content addressable memories (CAM). It has been known, however, that the PSE is area and power hungry, since many arithmetic operations are required. In this paper, 53 μW, 10 transistors per synapse architecture is presented which is based on current mode operations. The measurement results with 0.5 μm CMOS process are described. Compared with previously reported neural network LSIs which need several tens of transistors per synapse including storage elements, the present scheme uses 10 MOSFETs per synapse. There has been a proposal to make use of charge-based operations in building a neural network to reduce the number of MOSFETS but it requires a double poly-Si process for capacitors of good precision. The present scheme is manufacturable with the conventional single poly CMOS process and hence is easily integratable with other CMOS processors and logic blocks. The present architecture is extensible to VQs and CAMs and can be a promising macro in system LSIs