DocumentCode
2296935
Title
An effective datapath design methodology for high-frequency design
Author
Ben-Zvi, Carina ; McGuinness, Patrick J. ; Lassandro, Franklin
Author_Institution
Motorola Somerset, Austin, TX, USA
fYear
1998
fDate
5-7 Oct 1998
Firstpage
186
Lastpage
187
Abstract
We present a flow for effective high performance datapath design, and describe the results of this flow on a high-performance chip. This structured custom design flow combines custom logic design techniques with a timing-driven cell-based layout flow that is tuned specifically for datapath
Keywords
high level synthesis; logic design; custom logic design; datapath design methodology; high performance datapath design; high-frequency design; high-performance chip; timing-driven cell-based layout flow; Clocks; Design methodology; Design optimization; Libraries; Microprocessors; Routing; Target tracking; Timing; Wire; Wiring;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design: VLSI in Computers and Processors, 1998. ICCD '98. Proceedings. International Conference on
Conference_Location
Austin, TX
ISSN
1063-6404
Print_ISBN
0-8186-9099-2
Type
conf
DOI
10.1109/ICCD.1998.727041
Filename
727041
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