Title : 
Fixed-point error analysis and wordlength optimization of a distributed arithmetic based 8×8 2D-IDCT architecture
         
        
            Author : 
Kim, Seehyun ; Sung, Wonyong
         
        
            Author_Institution : 
Integrated Syst. Eng. Lab., LG Electron. Res. Center, Seoul, South Korea
         
        
        
            fDate : 
30 Oct-1 Nov 1996
         
        
        
        
            Abstract : 
The two dimensional discrete cosine transform (DCT) has been used widely for various image and video processing standards. Efficient implementation of the algorithm requires fixed-point arithmetic, which may result in a noticeable mismatch between the encoder and the decoder. The finite wordlength effects of a distributed arithmetic based 8×8 2D-IDCT (inverse discrete cosine transform) are analytically modeled. In order to accurately model the implementation hardware, the ensemble average of integer domain fixed-point errors after rounding is evaluated not only by calculating the mean and the variance but by considering the statistical distribution as well. Based on the error model, a set of optimum wordlengths conforming to the IEEE specifications is determined. There is a close agreement between the model and the bit-accurate simulation results
         
        
            Keywords : 
IEEE standards; digital arithmetic; discrete cosine transforms; error analysis; image coding; inverse problems; optimisation; roundoff errors; statistical analysis; telecommunication standards; transform coding; 2D IDCT architecture; IEEE specifications; bit accurate simulation results; decoder; distributed arithmetic; encoder; ensemble average; error model; fixed point error analysis; image processing standards; implementation hardware; integer domain fixed point errors; inverse discrete cosine transform; mean; optimum wordlengths; rounding; variance; video processing standards; wordlength optimization; Decoding; Discrete cosine transforms; Error analysis; Finite wordlength effects; Fixed-point arithmetic; Hardware; Quantization; Statistical distributions; Systems engineering and theory; Telephony;
         
        
        
        
            Conference_Titel : 
VLSI Signal Processing, IX, 1996., [Workshop on]
         
        
            Conference_Location : 
San Francisco, CA
         
        
            Print_ISBN : 
0-7803-3134-6
         
        
        
            DOI : 
10.1109/VLSISP.1996.558372