Title :
Performance-driven board-level routing for FPGA-based logic emulation
Author :
Mak, Wai-Kei ; Wong, D.F.
Author_Institution :
Dept. of Comput. Sci., Texas Univ., Austin, TX, USA
Abstract :
Previously, two algorithms for the board-level routing problem in FPGA-based logic emulators that use crossbars for interconnection were proposed. However, the performance issue was not considered in the previous algorithms. And they cannot handle routing constraints that may arise from certain timing requirement. So, in this paper we propose a performance-driven routing algorithm for the board-level routing problem that can handle additional routing constraints and reduce the delay of the routing solutions
Keywords :
field programmable gate arrays; logic design; FPGA-based logic emulation; crossbars; delay; interconnection; performance-driven board-level routing; timing requirement; Algorithm design and analysis; Delay; Digital systems; Emulation; Field programmable gate arrays; Logic arrays; Logic design; Pins; Routing; Timing;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1998. ICCD '98. Proceedings. International Conference on
Conference_Location :
Austin, TX
Print_ISBN :
0-8186-9099-2
DOI :
10.1109/ICCD.1998.727046
