Hardware/software co-verification, an IP vendors viewpoint

The increasing predominance and complexity of System on Chip (SoC) poses new challenges to both software and hardware designers, no more so than in the area of verification. As Intellectual Property (IP) from IP Vendors such as ARM Ltd., is incorporated into these designs to make maximum use of the integration capabilities of the Silicon Vendors, this verification problem is further compounded by the complex interactions between system software and hardware. At the same time as the ARM7TDMI has emerged as the embedded RISC processor of choice, the major EDA companies have made available the `Co-verification Environment´ which brings together the verification environments for both hardware and software developers. In order to make full use of the Co-verification Environment, the IP provider must work in conjunction with the EDA Vendors to make the required model views available. This paper outlines the needs and requirements for such model development work and the approach that was taken by the EDA Engineering Group within ARM Ltd