DocumentCode
2297639
Title
Quaternary 1T-2MTJ Cell Circuit for a High-Density and a High-Throughput Nonvolatile Bit-Serial CAM
Author
Matsunaga, Shoun ; Hanyu, Takahiro
Author_Institution
Center for Spintronics Integrated Syst., Tohoku Univ., Sendai, Japan
fYear
2012
fDate
14-16 May 2012
Firstpage
98
Lastpage
103
Abstract
A compact quaternary cell circuit using a single MOS transistor and two magnetic tunnel junction devices (1T-2MTJ) is proposed for a high-density nonvolatile bit-serial content-addressable memory (CAM). The use of quaternary CAM-cell structure makes the search-cycle counts half, which achieves a high-speed search operation. Moreover, the power supply of a CAM word circuit is cut off whenever a mismatched cell is detected during search operation, which greatly reduces the static power dissipation. In fact, the average activation ratio of a 128-bit CAM word circuit is about 2.05 percent. The efficiency of the proposed CAM-cell structure is discussed in comparison with a conventional binary CAM-cell structure under a 0.14 um CMOS/MTJ technology.
Keywords
MOS memory circuits; content-addressable storage; magnetic storage; magnetic tunnelling; CAM cell structure; CAM word circuit; compact quaternary cell circuit; high density nonvolatile bit-serial CAM; high throughput nonvolatile bit-serial CAM; magnetic tunnel junction devices; nonvolatile bit-serial content-addressable memory; quaternary 1T-2MTJ cell circuit; quaternary CAM-cell structure; single MOS transistor; Arrays; Computer aided manufacturing; Magnetic tunneling; Nonvolatile memory; Power dissipation; Random access memory; Resistance; Compact; Fine-Grain; Logic-in-Memory; Low-Power; MOS/MTJ-hybrid; MTJ; Magnetic Tunnel Junction; Power Gating; Spintronics;
fLanguage
English
Publisher
ieee
Conference_Titel
Multiple-Valued Logic (ISMVL), 2012 42nd IEEE International Symposium on
Conference_Location
Victoria, BC
ISSN
0195-623X
Print_ISBN
978-1-4673-0908-0
Type
conf
DOI
10.1109/ISMVL.2012.67
Filename
6214791
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