Unified Current-Source Control for Low-Power Current-Mode-Logic Bit-Serial Circuits

Author

Kisara, Shogo ; Kameyama, Michitaka

Author_Institution

Grad. Sch. of Inf. Sci., Tohoku Univ., Sendai, Japan

fYear

2012

fDate

14-16 May 2012

Firstpage

104

Lastpage

109

Abstract

This paper presents a low-power multiple-valued VLSI based on two current-source control techniques. The first technique is a current-source control based on valid data signal detection. The other technique is a current-source control such that current sources are turned off within a clock cycle after a logic operation completion signal is detected. In a multiple-valued reconfigurable VLSI, power consumption of a cell with the low-power technique is reduced to 49% in comparison with that of the cell without the low-power technique, when the operating frequency is 500MHz, and the utilization ratio of the cell is 25%.

Keywords

VLSI; clocks; current-mode circuits; current-mode logic; electric current control; low-power electronics; bit-serial circuits; clock cycle; current-mode-logic circuits; data signal detection; frequency 500 MHz; logic operation completion signal; low-power circuits; multiple-valued reconfigurable VLSI; power consumption; unified current-source control; CMOS integrated circuits; CMOS technology; Clocks; Computer architecture; Microprocessors; Power demand; Very large scale integration; Current-mode circuit; Current-source control; Multiple-valued logic; Reconfigurable VLSI;

fLanguage

English

Publisher

ieee

Conference_Titel

Multiple-Valued Logic (ISMVL), 2012 42nd IEEE International Symposium on

Conference_Location

Victoria, BC

ISSN

0195-623X

Print_ISBN

978-1-4673-0908-0

Type

conf

DOI

10.1109/ISMVL.2012.55

Filename

6214792