Current-Source-Sharing Differential-Pair Circuits for a Low-Power Fine-Grain Reconfigurable VLSI Architecture

A bit-serial reconfigurable VLSI using multiple-valued switch blocks and binary logic modules is proposed. In a cell, multiple-valued signaling is utilized to implement a compact switch block. Binary-controlled current steering technique is introduced utilizing a programmable series-gating differential-pair circuit to implement high-performance low-power arithmetic logic operations such as an arbitrary two-variable binary logic operation and a full-adder sum. Moreover, current-source sharing between a series-gating differential-pair circuit and a current-mode D-latch is proposed to reduce the current source count to reduce power consumption. As a result, the power consumption and the delay time of the proposed bit-serial cell are reduced to 63% and 72%, respectively, in comparison with those of a previous multiple-valued bit-serial cell.