Prediction of package warpage combined experimental and simulation for four maps substrate

As electronic devices become lighter, thinner, shorter, and smaller, IC packages follow. Low-profile type packages are reduced in thickness, so the stiffness of thin type packages is weaker due to the thermo-mechanical effects of manufacturing processes, testing, and operations. Due to the different temperatures in those processes, and the differences in coefficient thermal expansion (CTE) of each material, the mismatch of material properties induces package warpage and stress distribution. Both of these phenomena will change the package outline, in turn generating passivation cracks, pattern shift, loose bond balls, wire breakage, voids, buckling, hillocks, delamination, and/or de-bonding. Consequently, the reliability of microelectronic packages will be decreased and assembly quality lowered.