A Novel Synchronizer for OFDM-based UWB System on New Preamble Design

In OFDM-based UWB baseband, synchronizer plays a key role to the performance of the whole system. Therefore achieving an area and power efficient architecture at least SNR loss becomes the main challenge of synchronizer design. To meet 528 Msamples/s throughput, the parallel architecture is used in current approaches. But it leads to higher area and power consumption. In this paper, we propose an efficient synchronizer for OFDM-based UWB system, consisting of the filter-free symbol synchronizer, frequency synchronizer with improved Moose algorithm and sign-based auto-correlator. According to the results of synthesis using SMIC, 0.13 mum CMOS process, the proposed design can achieve the throughput requirement with only 24% gate count and 25% power consumption (in idle state) of the conventional four-parallelism approach.