1 V mixed-signal circuits in a 0.5 μm CMOS technology

Device characteristics for natural threshold voltage MOSFETs fabricated in a 0.5 μm CMOS technology show that saturation current follows an α-power law model (1_DS~(ν_GS-V _t)^α) with α=1.3. A 1 V power supply voltage is found to be close to optimum for mixed-signal circuits using these low-V, (V_t=0.2 V) MOSFETs. Experimental results at 1 V indicate a 360 ps logic SUM delay for a full adder circuit using natural MOSFETs. A 1 V mixed digital/analog standard cell library is developed using natural MOSFETs. Performance of the top 15 high-usage logic gates and three analog cells (switch, opamp, and comparator) operating at 1 V are discussed. Based on measured results and simulations, the 1 V digital library, using natural MOSFETs, is 10X more energy efficient than the 3.3 V library that uses normal MOSFETs