DocumentCode
2299328
Title
Architectural optimization of decimation filter using bitstream operation in GSM audio codec
Author
Kuriakose, Jijo ; Ristic, Sasa ; De Stegge, Dennis Aan ; De Cremoux, Guillaume
Author_Institution
Bus. Line Mobile Mixed-Signal Solutions, Philips Semicond., Nijmegen, Netherlands
Volume
1
fYear
2003
fDate
1-3 Oct. 2003
Firstpage
317
Abstract
This paper proposes an efficient architectural optimization method for the decimation stages in single bit sigma-delta modulators using multiplier-less FIR filters over direct implementation of FIR filters P.P. Vaidyanathan (1990), R.E. Crichiere (1983) for GSM applications. The proposed method uses adders to implement multiplication in filters.
Keywords
FIR filters; audio coding; cellular radio; circuit optimisation; codecs; minimisation; sigma-delta modulation; GSM audio codec; architectural optimization method; bitstream operation; decimation filter; hardware cost minimisation; multiplier-less FIR filters; multirate signal processing; polyphase filters; single bit sigma-delta modulators; Codecs; Digital filters; Digital systems; Electronic mail; Finite impulse response filter; Frequency; GSM; Hardware; Sampling methods; Signal processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Telecommunications in Modern Satellite, Cable and Broadcasting Service, 2003. TELSIKS 2003. 6th International Conference on
Print_ISBN
0-7803-7963-2
Type
conf
DOI
10.1109/TELSKS.2003.1246236
Filename
1246236
Link To Document