DocumentCode
2299678
Title
Synthesis of Reversible Synchronous Counters
Author
Khan, Mozammel H A ; Perkowski, Marek
Author_Institution
Dept. of Comput. Sci. & Eng., East West Univ., Dhaka, Bangladesh
fYear
2011
fDate
23-25 May 2011
Firstpage
242
Lastpage
247
Abstract
Reversible logic is very important in low-power circuit design and quantum computing. Though a significant number of works has been done on reversible combinational logic synthesis, only few papers have been published on reversible sequential logic synthesis and per mutative quantum automata. The reported works on reversible sequential logic discuss designs of reversible flip-flops and suggest synthesizing reversible sequential circuits by replacing the flip-flops and combinational parts of traditional sequential circuit designs by their reversible counterparts. In this paper, we discuss direct design of reversible synchronous counters based on positive polarity Reed-Muller expressions. Design results show that the direct design method is more efficient than the replacement method. The method can be also applied to per mutative quantum automata that have quantum memories external to the circuit.
Keywords
counting circuits; flip-flops; network synthesis; low-power circuit design; permutative quantum automata; positive polarity reed-muller expressions; quantum computing; quantum memories; reversible combinational logic synthesis; reversible flip-flops; reversible sequential logic; reversible synchronous counters; Clocks; Flip-flops; Latches; Logic gates; Master-slave; Radiation detectors; Sequential circuits; counter; quantum logic; reversible logic; sequential logic;
fLanguage
English
Publisher
ieee
Conference_Titel
Multiple-Valued Logic (ISMVL), 2011 41st IEEE International Symposium on
Conference_Location
Tuusula
ISSN
0195-623X
Print_ISBN
978-1-4577-0112-2
Electronic_ISBN
0195-623X
Type
conf
DOI
10.1109/ISMVL.2011.25
Filename
5954240
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