Current mode BiCMOS folded source-coupled logic circuits

Author

Kundan, Jayabalan ; Hasan, S. M Rezaul

Author_Institution

Sch. of Electr. & Electron. Eng., Univ. Sains Malaysia, Tronoh, Malaysia

Volume

3

fYear

1997

fDate

9-12 Jun 1997

Firstpage

1880

Abstract

A new BiCMOS Folded Source-Coupled Logic (Bi-FSCL) circuit is proposed. This is an improved version of CMOS Folded Source-Coupled Logic (C-FSCL). An Emitter Follower (EF) is implemented at the output of C-FSCL to obtain the Bi-FSCL gate. It has been shown that by using this EF, the output of the BiFSCL is faster than C-FSCL and capable of driving higher load (higher fan-out) at low supply voltage. Thorough current steering and charge storage analysis was performed for the folded source-coupled logic techniques. This paper focuses on simulated results based on a 2 μm n-well BiCMOS process. The simulations were carried out using BSIM parameters at a supply voltage of 3.3 V. Implementation of a NAND/AND gate is also presented

Keywords

BiCMOS digital integrated circuits; BiCMOS logic circuits; combinational circuits; logic gates; 2 micron; 3.3 V; BSIM parameters; FSCL circuit; NAND/AND gate; charge storage analysis; current mode BiCMOS logic; current steering analysis; emitter follower; fan-out improvement; folded source-coupled logic circuits; low supply voltage; n-well BiCMOS process; BiCMOS integrated circuits; CMOS logic circuits; Design engineering; Diodes; Equations; Inverters; Logic circuits; MOS devices; Power capacitors; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on

Print_ISBN

0-7803-3583-X

Type

conf

DOI

10.1109/ISCAS.1997.621516

Filename

621516