• DocumentCode
    2302186
  • Title

    DFT and Test: Ensuring Product Quality

  • Author

    Nagapalli, Nagesh

  • Author_Institution
    AMD
  • fYear
    2007
  • fDate
    39142
  • Firstpage
    5
  • Lastpage
    5
  • Abstract
    Once design changes are made for DFM/DFY, it is necessary to quantify their impact so that knowledge about yield contribution of different features can be fed back to design and DFM tools.Test presents an opportunity to close the loop by crafting test patterns to expose the defect prone features during automatic test pattern generation (ATPG) and by analyzing silicon failures through diagnosis to determine the features that are actually causing yield loss and their relative impact.
  • Keywords
    Automatic test pattern generation; Automatic testing; Design for manufacture; Design for testability; Failure analysis; Manufacturing processes; Pattern analysis; Semiconductor device manufacture; Silicon; Test pattern generators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Quality Electronic Design, 2007. ISQED '07. 8th International Symposium on
  • Conference_Location
    San Jose, CA, USA
  • Print_ISBN
    0-7695-2795-7
  • Type

    conf

  • DOI
    10.1109/ISQED.2007.63
  • Filename
    4149001