Reconfigurable Model-Based Test Program Generator for Microprocessors

Automatic generation and simulation of test programs is known to be the main means for verifying microprocessors. The problem is that test program generators for new designs are often developed from scratch with little reuse of well-tried components. State-of-the-art tools, like Genesys-Pro and RAVEN, meet the challenge by using a model-based approach, where a microprocessor model is separated from a platform-independent generation core. However, there is still a problem. Developing a microprocessor model is rather difficult and usually requires deep knowledge of the inner-core structure and interfaces. In this paper, we describe a concept of a reconfigurable test program generator being customized with the help of architecture specifications and configuration files, which describe parameters of the microprocessor subsystems (pipeline, memory, and others). The suggested approach eases the model development and makes it possible to apply the model-based testing in the early design stages when the microprocessor architecture is frequently modified.