Constant-gm rail-to-rail CMOS input stages with improved robustness

A novel method to make the g_m of rail-to-rail input stages more constant over a rail-to-rail common mode voltage range is introduced. The deviation of g_m is reduced by connecting two rail-to-rail input stages in parallel and controlling their bias so that take-over regions occur at different common-mode levels. This method is not restricted to any single topology, but low supply voltage makes certain structures more favorable. The method is demonstrated by two different input stages capable of rail-to-rail operation at 3 V. Both circuits are robust with respect to process variations of the NMOS- and PMOS-transistor transconductance parameter. This is accomplished by biasing the NMOS-differential pair with a current that tracks the transconductance of the PMOS-pair