Title :
A 8b 10Ms/s Low Power Pipelined A/D Converter
Author :
Yuan, Bi ; Zhang, Yi ; He, Lili
Author_Institution :
Dept. of Electr. Eng., San Jose State Univ., CA
Abstract :
This paper describes an 8-bit, 10 MSamples/second analog to digital converter, with 2V fully differential input range, which is implemented in TSMC 0.25mum CMOS technology. It achieves low power dissipation of 25mW, and the chip area is 0.56mm2. Measured performance yields a very good VTC curve and a sine wave fitting curve for 200KHz input at 10Msample/s, DNL testing of -0.2LSB-0.75LSB; INL testing of -0.2LSB ~ 0.65LSB, 44.62dB of SNDR (signal to noise plus distortion ratio) and ENOB of 7.12 bits
Keywords :
CMOS integrated circuits; analogue-digital conversion; low-power electronics; 0.25 micron; 2 V; 200 kHz; 25 mW; TSMC CMOS technology; analog to digital converter; low power pipelined A/D converter; Analog-digital conversion; Bandwidth; CMOS technology; Circuit testing; Energy consumption; Error correction; Operational amplifiers; Pipeline processing; Switching circuits; Switching converters;
Conference_Titel :
Quality Electronic Design, 2007. ISQED '07. 8th International Symposium on
Conference_Location :
San Jose, CA
Print_ISBN :
0-7695-2795-7
DOI :
10.1109/ISQED.2007.7
