Recent progress on analog/digital VLSI 2D filter circuits for beamforming antenna arrays

This paper presents three recently proposed 2D filter architectures suitable for UWB beamforming of spatio-temporal plane waves. Massively-parallel systolic array based hardware architectures for the reduced complexity direct-form-I and the differential-form 2D multi-beam filters that operate in discrete-space-discrete-time domain are presented. Magnitude frequency response obtained by prototype FPGA implementation on Xilinx Virtex-4 Sx35-10ff668 device for dual-beam case with space-space DOAs 10° and 70° is presented. A novel 2D fan filter architecture that operates in discrete-space-continuous-time (DSCT) mixed domain is also presented. An all-pass filter based time delay approximation is used to obtain the DSCT version of the available 2D FIR digital fan filter prototype. The proposed time delay approximation method is simulated using the BSIM4 models of 90 nm CMOS from ST Microelectronics using Cadence Virtuoso. The 2D fan filter magnitude frequency response is obtained from both theoretical and simulated data for the all-pass time delay approximation.