Title :
Probabilistic Error Propagation Modeling in Logic Circuits
Author :
Gupta, Shekhar ; Van Gemund, Arjan J C ; Abreu, Rui
Author_Institution :
Embedded Software Lab., Delft Univ. of Technol., Delft, Netherlands
Abstract :
Recent study has shown that accurate knowledge of the false negative rate (FNR) of tests can significantly improve the diagnostic accuracy of spectrum-based fault localization. To understand the principles behind FNR modeling in this paper we study three error propagation probability (EPP) modeling approaches applied to a number of logic circuits from the 74XXX/ISCAS-85 benchmark suite. Monte Carlo simulations for random injected faults show that a deterministic approach that models gate behavior provides high accuracy (O(1%)), while probabilistic approaches that abstract from gate modeling generate higher prediction errors (O(10%)), which increase with the number of injected faults.
Keywords :
Monte Carlo methods; logic circuits; program debugging; Monte Carlo simulation; error propagation probability modeling approach; false negative rate; gate behavior; logic circuit; software debugging spectrum; spectrum-based fault localization; Circuit faults; Computational modeling; Integrated circuit modeling; Logic gates; Numerical models; Predictive models; Probabilistic logic;
Conference_Titel :
Software Testing, Verification and Validation Workshops (ICSTW), 2011 IEEE Fourth International Conference on
Conference_Location :
Berlin
Print_ISBN :
978-1-4577-0019-4
Electronic_ISBN :
978-0-7695-4345-1
DOI :
10.1109/ICSTW.2011.40